This demo projects would like to be an easy way to implement an automatic startup of the Axioline configuration on the local bus of the PLC Next.
The project has been developed entirely in IEC 61131 to help developer who are not used to C++ or other HighLevel languages.
To do so I used the procedure for the bus startup found in Bus Conductor (https://github.com/PLCnext/BusConductor) and I trasposed it in IEC 61131.
- PLCnext Controller
You should already find it in the default path for PLCNext Eng library (C:\Program Files\PHOENIX CONTACT\PLCnext Engineer 2020.0\Libraries) as it comes with the software installation.
The projects has been tested with:
- PLCNext Engineer 2020.0.1
- AXC F 2152 FW 2020
It is a normal PLCNext project, so you just need to know how to download a project with PLCNext Engineer 😉
In the project you will find 2 function blocks:
It will simply startup the connected bus accepting the whole physical configuration.
It starts the configuration as the other block but it will give also the list of connected modules.
To get informations from the modules, I used PDI objects, please refer to the Axioline manual to get more informations about them.
The information given by InitAxio_AutoConfig are:
- DeviceFamily [STRING58] -> The module type (analog/digital, input/output, others)
- OrderNumber [STRING32] -> The order number of the module
- ProductName [STRING32] -> The product name of the module
- PD_Length [UINT] -> The number of words of Input process data of the module (Please consider that axioline modules have the same dimension for PDIN and PDOUT)
This properties has been choosen because I thought they could be the minimum information you may need for an easy use of the bus, however it is possible to add (or remove) properties reading the desired PDI object.
The project’s structure is quite simple
Software side, the project contains a single Cylic task (100ms) with the 2 available function blocks.
Please notice that both the blocks need to be used in a Cyclic Task.
Hardware side, you can see the dummy module AXL F physcial; this module is needed for the dynamic bus configuration.
It provides 2 arrays that contains all the process data produced and consumed by the modules.
The Main program contains the two available function blocks
As you can see, there is no need of particular configuration to use these FBs.
Please noticed that you can use just one of them at one time.
The function block follow different phases
As already mentioned I copied these steps from C++ Bus Conductor library, they are the necessary steps for the Axiobus startup.
This function block is quite the same of the previous one but it introduces a step before the End step:
During the Step 9 the function block reads the properties of every module found in the configuration using PDI read commands.
Also the Step 9 is developed in phases to make it easier to modify.
The demo project provides just few tools that might help you to develope more articulated dynamic configurations.
You can for example compare the list of modules read with a desired configuration (for example simply looking at the product numbers) and then choose to prevent the use of all process datas or use just a part of them.
You can implement routines for dynamic configuration of connected modules (specially for analog modules).
Or you can use the process data length to dynamically change the dimension of a module (e.g. if you replace a 16DI with a 32DI module).
Or it can just help you to implement a dynamic bus configuration in your IEC 61131 project.